HRM Research Engineering
Independent research and engineering work on the Hierarchical Reasoning Model, porting the reference implementation to Apple Silicon and hardening its evaluation pipeline.
This is a derivative work of the open-source Sapient HRM project (arXiv:2506.21734). The original authors and publication are fully credited, and the repository preserves the original Apache-2.0 licence terms.
The Problem
Reference implementations of research models assume a CUDA machine and a specific dataset layout. Reproducing results on different hardware means working through hard CUDA dependencies, brittle checkpoint loading and undocumented dataset assumptions before any experiment can run at all.
What HRM is
The Hierarchical Reasoning Model is a recurrent reasoning architecture with interacting high-level and low-level modules, designed for structured reasoning tasks such as ARC, Sudoku and Maze. It emphasizes computational depth over parameter count, staying relatively compact while reasoning through multiple recurrent passes.
Engineering contributions
The work in this repository is engineering rather than modelling — making the reference implementation runnable, debuggable and reproducible on non-CUDA hardware.
- Apple Silicon support path running MPS/CPU-first, with no CUDA requirement for the core evaluation flow
- FlashAttention compatibility troubleshooting and fallbacks
- ARC dataset pipeline debugging around split metadata and dataset.json issues
- Checkpoint loading robustness fixes across PyTorch directory and storage formats
- Evaluation experiments and small-sample benchmarking via max_samples runs
- Utility scripts for reproducible debugging workflows
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